Holy moly this is awesome! I am in for the 128GB SKU.
That’s 96GB of usable VRAM! And way more CPU bandwidth than any desktop Zen chip.
I know people are going to complain about non upgradable memory, but you can just replace the board, and in this case it’s so worth it for the speed/power efficiency. This isn’t artificial crippling, it physically has to be soldered, at least until LPCAMM catches on.
My only ask would be a full X16 (or at least a physical X16/electrical x8) PCIe slot or breakout ribbon. X4 would be a bit of a bottleneck for some GPUs/workloads… Does Strix Halo even support that?
I understand the memory constraints but it does feel weird for framework, is all I have to say. But that’s also the general trajectory of computing from what it seems. I really want lpcamm to catch on!
Apparently Framework did try to get AMD to use LPCAMM, but it just didn’t work from a signal integrity standpoint at the kind of speeds they need to run the memory at.
Eventually most system RAM will have to be packaged anyway. Physics dictates that one pays a penalty going over pins and mobo traces, and it gets more severe with every advancement.
It’s possible that external RAM will eventually evolve into a “2nd tier” of system memory, for background processes, spillover, inactive programs/data, things like that.
Holy moly this is awesome! I am in for the 128GB SKU.
That’s 96GB of usable VRAM! And way more CPU bandwidth than any desktop Zen chip.
I know people are going to complain about non upgradable memory, but you can just replace the board, and in this case it’s so worth it for the speed/power efficiency. This isn’t artificial crippling, it physically has to be soldered, at least until LPCAMM catches on.
My only ask would be a full X16 (or at least a physical X16/electrical x8) PCIe slot or breakout ribbon. X4 would be a bit of a bottleneck for some GPUs/workloads… Does Strix Halo even support that?
I understand the memory constraints but it does feel weird for framework, is all I have to say. But that’s also the general trajectory of computing from what it seems. I really want lpcamm to catch on!
Apparently Framework did try to get AMD to use LPCAMM, but it just didn’t work from a signal integrity standpoint at the kind of speeds they need to run the memory at.
Eventually most system RAM will have to be packaged anyway. Physics dictates that one pays a penalty going over pins and mobo traces, and it gets more severe with every advancement.
It’s possible that external RAM will eventually evolve into a “2nd tier” of system memory, for background processes, spillover, inactive programs/data, things like that.
That would be fine. But as long as it can use it as RAM and not just a staging ground.
Keep in mind that it would be pretty slow, as it doesn’t make sense to burn power and die area on a wide secondary bus.